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Digital System Test and Testable Design Zainalabedin Navabi

By:

Navabi Zainalabedin

Publication details: Springer c2011Description: xxiii,435pISBN:

9781441975478

DDC classification:

004.436.2 NAV

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Holdings
Item type	Current library	Call number	Status	Barcode
Reference	IIITDM Kancheepuram Library Reference	004.436.2 NAV (Browse shelf(Opens below))	Available	0002665
Reference	IIITDM Kancheepuram Library Reference	004.436.2 NAV (Browse shelf(Opens below))	Available	0002666
Reference	IIITDM Kancheepuram Library Reference	004.436.2 NAV (Browse shelf(Opens below))	Available	0002667

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Previous	004.436.2 CHU FPGA Prototyping by Verilog examples	004.436.2 NAV Digital System Test and Testable Design	004.436.2 NAV Digital System Test and Testable Design	004.436.2 NAV Digital System Test and Testable Design	004.436.2 RUS VHDL for logic synthesis	004.43C KIN C Programming: a modern approach	004.451:004.031.6 VAL Embeded systems : real time operating systems for ARM cortex-m microcontrollers	Next

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