| 000 | 00648 a2200145 4500 | ||
|---|---|---|---|
| 082 | _a004.312.42 RAJ | ||
| 245 |
_aA clock gated flip-flop for low power applications _cRajesh Naik.B |
||
| 260 |
_a IIITDM Kancheepuram _bDept of Electronics Engineering _c2012 |
||
| 100 |
_aRajesh Naik.B _9906 |
||
| 502 | _aB.Tech - Theses | ||
| 653 | _aFlip-flop, Low power | ||
| 700 |
_aDr.Noor Mohammad Sk _9885 |
||
| 952 |
_w2012-09-11 _pTD00056 _r2012-09-11 _40 _00 _bIIITDM _10 _o004.312.42 RAJ _d2012-09-11 _8TD _70 _cTD _2udc _yTD _aIIITDM |
||
| 999 |
_c1015 _d1015 |
||
| 952 |
_pCD00144 _40 _00 _bIIITDM _10 _o004.312.42 RAJ _d2012-09-12 _8NBM _70 _cNBM _2udc _yTD _aIIITDM |
||