| 000 | 00456 a2200145 4500 | ||
|---|---|---|---|
| 082 | _a621.391.81 NAN | ||
| 245 | _aDesign of an Optimized low power vedic Multiplier Unit For Digital Signal Processing Applications | ||
| 260 |
_aIIITDM Kancheepuram _bDept of Electronics Engineering _c2014 |
||
| 300 | _ax,63 p | ||
| 942 | _cTD | ||
| 100 | _aNandita Bhaskhar | ||
| 502 | _aB.Tech - Theses | ||
| 653 | _aProcessing Applications | ||
| 700 | _eDr. Binsu J Kailath | ||
| 999 |
_c2112 _d2112 |
||