Design of an Optimized low power vedic Multiplier Unit For Digital Signal Processing Applications

By: Contributor(s): Publication details: IIITDM Kancheepuram Dept of Electronics Engineering 2014Description: x,63 pSubject(s): DDC classification:
  • 621.391.81 NAN
Dissertation note: B.Tech - Theses
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Item type Current library Call number Status Date due Barcode Item holds
Theses and Dissertations Theses and Dissertations IIITDM Kancheepuram Library 621.391.81 NAN (Browse shelf(Opens below)) Available TD00106
Total holds: 0

B.Tech - Theses

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